428 search results - page 51 / 86 » Performance Modelling and Evaluation of Firewall Architectur... |
149
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HIPEAC
2005
Springer
15 years 10 months ago
2005
Springer
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
148
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HPCA
2007
IEEE
16 years 5 months ago
2007
IEEE
We apply a scalable approach for practical, comprehensive design space evaluation and optimization. This approach combines design space sampling and statistical inference to ident...
123
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WWW
2008
ACM
16 years 6 months ago
2008
ACM
Mashup applications mix and merge content (data and code) from multiple content providers in a user's browser, to provide high-value web applications that can rival the user ...
149
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ISCA
2008
IEEE
15 years 11 months ago
2008
IEEE
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
133
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ASWEC
2007
IEEE
15 years 9 months ago
2007
IEEE
There is a growing demand for web applications to provide fair service to the highly concurrent requests. In this paper, we present an approach to addressing this requirement. Bas...