In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
In today’s deep-submicron designs, the interconnect delays contribute an increasing part to the overall performance of an implementation. Particularly when targeting field prog...
In this paper we present a method for determining optimal routes along selected paths in a wireless mesh network based on an interference aware delay analysis. We develop an analyt...
Mobile ad hoc networks are collections of mobile nodes without any fixed infrastructure or central co-ordinating mechanism for packet routing. Consequently, routing is a challenge...
In this paper, we address the problem of simultaneous routing and buffer insertion. Recently in [12, 22], the authors considered simultaneous maze routing and buffer insertion und...
Li-Da Huang, Minghorng Lai, D. F. Wong, Youxin Gao