Sciweavers

3567 search results - page 588 / 714
» Performance Prediction and Its Use in Parallel and Distribut...
Sort
View
HPCA
2001
IEEE
14 years 8 months ago
Automatically Mapping Code on an Intelligent Memory Architecture
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
Jaejin Lee, Yan Solihin, Josep Torrellas
ICVS
1999
Springer
14 years 14 days ago
Action Reaction Learning: Automatic Visual Analysis and Synthesis of Interactive Behaviour
We propose Action-Reaction Learning as an approach for analyzing and synthesizing human behaviour. This paradigm uncovers causal mappings between past and future events or between...
Tony Jebara, Alex Pentland
IEEEPACT
2009
IEEE
13 years 6 months ago
FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery
Abstract--Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...
COLCOM
2005
IEEE
14 years 1 months ago
On-demand overlay networking of collaborative applications
We propose a new overlay network, called Generic Identifier Network (GIN), for collaborative nodes to share objects with transactions across affiliated organizations by merging th...
Cheng-Jia Lai, Richard R. Muntz
MIDDLEWARE
2005
Springer
14 years 1 months ago
An Optimal Overlay Topology for Routing Peer-to-Peer Searches
Unstructured peer-to-peer networks are frequently used as the overlay in various middleware toolkits for emerging applications, from content discovery to query result caching to di...
Brian F. Cooper