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ISCAS
2007
IEEE
78views Hardware» more  ISCAS 2007»
14 years 2 months ago
Towards Automated Power Gating of Registers using CoDeL
— In this paper, we use the CoDeL platform to develop test circuits and analyze the potential and performance impact of power gating individual registers. For each register, we e...
Nainesh Agarwal, Nikitas J. Dimopoulos
PLDI
2004
ACM
14 years 2 months ago
Min-cut program decomposition for thread-level speculation
With billion-transistor chips on the horizon, single-chip multiprocessors (CMPs) are likely to become commodity components. Speculative CMPs use hardware to enforce dependence, al...
Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykuma...
TASLP
2008
108views more  TASLP 2008»
13 years 8 months ago
A Regression Approach to Music Emotion Recognition
Content-based retrieval has emerged in the face of content explosion as a promising approach to information access. In this paper, we focus on the challenging issue of recognizing ...
Yi-Hsuan Yang, Yu-Ching Lin, Ya-Fan Su, Homer H. C...
HPDC
2009
IEEE
14 years 3 months ago
Exploring data reliability tradeoffs in replicated storage systems
This paper explores the feasibility of a cost-efficient storage architecture that offers the reliability and access performance characteristics of a high-end system. This architec...
Abdullah Gharaibeh, Matei Ripeanu
CODES
2006
IEEE
14 years 2 months ago
Integrated analysis of communicating tasks in MPSoCs
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
Simon Schliecker, Matthias Ivers, Rolf Ernst