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» Performance Studies of a Parallel Prolog Architecture
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JUCS
2006
95views more  JUCS 2006»
13 years 8 months ago
Fault Tolerant Neural Predictors for Compression of Sensor Telemetry Data
: When dealing with remote systems, it is desirable that these systems are capable of operation within acceptable levels with minimal control and maintenance. In terms or transmiss...
Rajasvaran Logeswaran
SASP
2008
IEEE
162views Hardware» more  SASP 2008»
14 years 2 months ago
Accelerating Compute-Intensive Applications with GPUs and FPGAs
—Accelerators are special purpose processors designed to speed up compute-intensive sections of applications. Two extreme endpoints in the spectrum of possible accelerators are F...
Shuai Che, Jie Li, Jeremy W. Sheaffer, Kevin Skadr...
IPPS
2009
IEEE
14 years 3 months ago
Handling OS jitter on multicore multithreaded systems
Various studies have shown that OS jitter can degrade parallel program performance considerably at large processor counts. Most sources of system jitter fall broadly into 5 catego...
Pradipta De, Vijay Mann, Umang Mittaly
HPCA
2008
IEEE
14 years 8 months ago
Roughness of microarchitectural design topologies and its implications for optimization
Recent advances in statistical inference and machine learning close the divide between simulation and classical optimization, thereby enabling more rigorous and robust microarchit...
Benjamin C. Lee, David M. Brooks
HPCA
2001
IEEE
14 years 8 months ago
Data-Flow Prescheduling for Large Instruction Windows in Out-of-Order Processors
The performance of out-of-order processors increases with the instruction window size. In conventional processors, the effective instruction window cannot be larger than the issue...
Pierre Michaud, André Seznec