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MICRO
1997
IEEE
139views Hardware» more  MICRO 1997»
13 years 11 months ago
The Filter Cache: An Energy Efficient Memory Structure
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
Johnson Kin, Munish Gupta, William H. Mangione-Smi...
CLUSTER
2007
IEEE
13 years 11 months ago
Identifying energy-efficient concurrency levels using machine learning
Abstract-- Multicore microprocessors have been largely motivated by the diminishing returns in performance and the increased power consumption of single-threaded ILP microprocessor...
Matthew Curtis-Maury, Karan Singh, Sally A. McKee,...
CODES
2004
IEEE
13 years 11 months ago
Dynamic overlay of scratchpad memory for energy minimization
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
Manish Verma, Lars Wehmeyer, Peter Marwedel
SIES
2008
IEEE
14 years 1 months ago
Dynamic voltage and frequency scaling for optimal real-time scheduling on multiprocessors
Abstract— Not only system performance but also energy efficiency is critically important for embedded systems. Optimal real-time scheduling is effective to not only schedulabili...
Kenji Funaoka, Akira Takeda, Shinpei Kato, Nobuyuk...
CASES
2003
ACM
14 years 19 days ago
A control-theoretic approach to dynamic voltage scheduling
The development of energy-conscious embedded and/or mobile systems exposes a trade-off between energy consumption and system performance. Recent microprocessors have incorporated ...
Ankush Varma, Brinda Ganesh, Mainak Sen, Suchismit...