108 search results - page 1 / 22 » Performance and Power Impact of Issue-width in Chip-Multipro... |
ICPP
2003
IEEE
14 years 26 days ago
2003
IEEE
In chip-multiprocessors (CMPs), the number of cores and the issue width of each core presents an important design trade-off to balance the amount of TLP and ILP between multi-thre...
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
CAL
2006
13 years 7 months ago
2006
This paper evaluates asymmetric cluster chip multiprocessor (ACCMP) architectures as a mechanism to achieve the highest performance for a given power budget. ACCMPs execute serial ...
ICCD
2011
IEEE
12 years 7 months ago
2011
IEEE
—A key challenge in chip multiprocessor (CMP) design is to optimize the performance within a power budget limited by the CMP’s cooling, packaging, and power supply capacities. ...
IEEEPACT
2006
IEEE
14 years 1 months ago
2006
IEEE
Previous studies have demonstrated the advantages of single-ISA heterogeneous multi-core architectures for power and performance. However, none of those studies examined how to de...