1007 search results - page 12 / 202 » Performance based design of high-level language-directed com... |
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
AIEDAM
2002
2002
Drawing marks, acts, and reacts: Toward a computational sketching interface for architectural design
13 years 7 months ago
Architects use sketching and diagramming in their design process to perform functional reasoning, formal arrangements, analogy transfer, structure mapping, and knowledge acquisiti...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Nowadays, distributed collaborative virtual environments are used in many scenarios such as tele-surgery, gaming, and industrial training, However several challenging issues remai...
DAC
2001
ACM
14 years 8 months ago
2001
ACM
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
AISS
2010
13 years 4 months ago
2010
In this paper, we propose the computation model for computing an Inter-layer path based on PCE. Comparing the performance of these various models, we wanna propose the model that ...