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HIPEAC
2005
Springer
14 years 1 months ago
A Practical Method for Quickly Evaluating Program Optimizations
This article aims at making iterative optimization practical and usable by speeding up the evaluation of a large range of optimizations. Instead of using a full run to evaluate a s...
Grigori Fursin, Albert Cohen, Michael F. P. O'Boyl...
CODES
2002
IEEE
14 years 15 days ago
Locality-conscious process scheduling in embedded systems
In many embedded systems, existence of a data cache might influence the effectiveness of process scheduling policy significantly. Consequently, a scheduling policy that takes in...
Ismail Kadayif, Mahmut T. Kandemir, Ibrahim Kolcu,...
ASAP
2007
IEEE
123views Hardware» more  ASAP 2007»
14 years 1 months ago
A memcpy Hardware Accelerator Solution for Non Cache-line Aligned Copies
In this paper, we present a hardware solution to perform non cache-line aligned memory copies allowing the commonly used memcpy function to cope with word copies. The main purpose...
Filipa Duarte, Stephan Wong
VEE
2012
ACM
187views Virtualization» more  VEE 2012»
12 years 3 months ago
DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support
Dynamic Binary Translators (DBT) and Dynamic Binary Optimization (DBO) by software are used widely for several reasons including performance, design simplification and virtualiza...
Demos Pavlou, Enric Gibert, Fernando Latorre, Anto...
CGO
2003
IEEE
13 years 11 months ago
METRIC: Tracking Down Inefficiencies in the Memory Hierarchy via Binary Rewriting
In this paper, we present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applicatio...
Jaydeep Marathe, Frank Mueller, Tushar Mohan, Bron...