121 search results - page 12 / 25 » Performance evaluation for system-on-chip architectures usin... |
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design di...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
The microarchitectural design space of a new processor is too large for an architect to evaluate in its entirety. Even with the use of statistical simulation, evaluation of a sing...
SAMOS
2007
Springer
14 years 1 months ago
2007
Springer
The Sesame modeling and simulation framework aims at early and thus efficient system-level design space exploration of embedded multimedia system architectures. So far, Sesame onl...
ANCS
2011
ACM
12 years 7 months ago
2011
ACM
The largest enterprise networks already contain hundreds of thousands of hosts. Enterprise networks are composed of Ethernet subnets interconnected by IP routers. These routers re...