121 search results - page 19 / 25 » Performance evaluation for system-on-chip architectures usin... |
158
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ISVLSI
2007
IEEE
15 years 10 months ago
2007
IEEE
— We present a performance analysis of CoDeL, a highly efficient automated clock gating platform for rapidly developing power efficient hardware architectures. It automatically...
141
Voted
ISPASS
2008
IEEE
15 years 10 months ago
2008
IEEE
Many programs go through phases as they execute. Knowing where these phases begin and end can be beneficial. For example, adaptive architectures can exploit such information to lo...
159
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CODES
2004
IEEE
15 years 7 months ago
2004
IEEE
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
137
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ICPADS
1998
IEEE
15 years 8 months ago
1998
IEEE
Java-Web Computing paradigm changed Internet into computing environment. For Java-Web Computing and many Java applications, a new Java processor, called simultaneous multithreaded...
156
Voted
HPCA
2005
IEEE
16 years 4 months ago
2005
IEEE
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...