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» Performance improvement with circuit-level speculation
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ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
14 years 5 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...
DAC
2001
ACM
14 years 9 months ago
Speculation Techniques for High Level Synthesis of Control Intensive Designs
The quality of synthesis results for most high level synthesis approaches is strongly a ected by the choice of control ow through conditions and loops in the input description. In...
Sumit Gupta, Nick Savoiu, Sunwoo Kim, Nikil D. Dut...
JSA
2007
115views more  JSA 2007»
13 years 8 months ago
Speculative trivialization point advancing in high-performance processors
Trivial instructions are those instructions whose output can be determined without performing the actual computation. This is due to the fact that for these instructions the outpu...
Ehsan Atoofian, Amirali Baniasadi
IPPS
2000
IEEE
14 years 25 days ago
A Mechanism for Speculative Memory Accesses Following Synchronizing Operations
In order to reduce the overhead of synchronizing operations of shared memory multiprocessors, this paper proposes a mechanism, named specMEM, to execute memory accesses following ...
Takayuki Sato, Kazuhiko Ohno, Hiroshi Nakashima
PPOPP
2003
ACM
14 years 1 months ago
Compiler support for speculative multithreading architecture with probabilistic points-to analysis
Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that cannot be identified statically. Speedup can be obtained by speculatively executing threa...
Peng-Sheng Chen, Ming-Yu Hung, Yuan-Shin Hwang, Ro...