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MICRO
1998
IEEE
139views Hardware» more  MICRO 1998»
13 years 11 months ago
A Dynamic Multithreading Processor
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...
Haitham Akkary, Michael A. Driscoll
MICRO
2000
IEEE
107views Hardware» more  MICRO 2000»
13 years 11 months ago
Register integration: a simple and efficient implementation of squash reuse
Register integration (or simply integration) is a mechanism for incorporating speculative results directly into a sequential execution using data-dependence relationships. In this...
Amir Roth, Gurindar S. Sohi
ASPLOS
2008
ACM
13 years 9 months ago
Parallelizing security checks on commodity hardware
Speck1 is a system that accelerates powerful security checks on commodity hardware by executing them in parallel on multiple cores. Speck provides an infrastructure that allows se...
Edmund B. Nightingale, Daniel Peek, Peter M. Chen,...
CHI
1999
ACM
13 years 11 months ago
A Better Mythology for System Design
The past decades have seen huge improvements in computer systems but these have proved difficult to translate into comparable improvements in the usability and social integration)...
Jed Harris, D. Austin Henderson Jr.
ICS
2007
Tsinghua U.
14 years 1 months ago
An L2-miss-driven early register deallocation for SMT processors
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
Joseph J. Sharkey, Dmitry V. Ponomarev