176 search results - page 35 / 36 » Performance improvement with circuit-level speculation |
HPCA
2004
IEEE
14 years 7 months ago
2004
IEEE
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
MICRO
2005
IEEE
14 years 28 days ago
2005
IEEE
Conventional processors use a fully-associative store queue (SQ) to implement store-load forwarding. Associative search latency does not scale well to capacities and bandwidths re...
JSA
2006
13 years 7 months ago
2006
It is often possible to greatly improve the performance of a hardware system via the use of predictive (speculative) techniques. For example, the performance of out-of-order micro...
WWW
2008
ACM
2008
ACM
Validating the use and role of visual elements of web pages in navigation with an eye-tracking study
14 years 8 months ago
This paper presents an eye-tracking study that examines how people use the visual elements of Web pages to complete certain tasks. Whilst these elements are available to play thei...
ICS
1998
Tsinghua U.
13 years 11 months ago
1998
Tsinghua U.
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...