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» Performance of Hardware Compressed Main Memory
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DAC
2000
ACM
14 years 9 months ago
Code compression for low power embedded system design
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
Haris Lekatsas, Jörg Henkel, Wayne Wolf
SIGMETRICS
2008
ACM
214views Hardware» more  SIGMETRICS 2008»
13 years 8 months ago
HMTT: a platform independent full-system memory trace monitoring system
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu, Jianp...
IEEEHPCS
2010
13 years 6 months ago
Retargeting PLAPACK to clusters with hardware accelerators
Hardware accelerators are becoming a highly appealing approach to boost the raw performance as well as the price-performance and power-performance ratios of current clusters. In t...
Manuel Fogue, Francisco D. Igual, Enrique S. Quint...
MICRO
2003
IEEE
161views Hardware» more  MICRO 2003»
14 years 1 months ago
Design and Implementation of High-Performance Memory Systems for Future Packet Buffers
In this paper we address the design of a future high-speed router that supports line rates as high as OC-3072 (160 Gb/s), around one hundred ports and several service classes. Bui...
Jorge García-Vidal, Jesús Corbal, Ll...
EMSOFT
2009
Springer
14 years 2 months ago
Adding aggressive error correction to a high-performance compressing flash file system
While NAND flash memories have rapidly increased in both capacity and performance and are increasingly used as a storage device in many embedded systems, their reliability has de...
Yangwook Kang, Ethan L. Miller