Sciweavers

290 search results - page 33 / 58
» Performance of Hardware Compressed Main Memory
Sort
View
ACMMSP
2005
ACM
106views Hardware» more  ACMMSP 2005»
14 years 1 months ago
Impact of modern memory subsystems on cache optimizations for stencil computations
In this work we investigate the impact of evolving memory system features, such as large on-chip caches, automatic prefetch, and the growing distance to main memory on 3D stencil ...
Shoaib Kamil, Parry Husbands, Leonid Oliker, John ...
CASES
2003
ACM
14 years 1 months ago
Polynomial-time algorithm for on-chip scratchpad memory partitioning
Focusing on embedded applications, scratchpad memories (SPMs) look like a best-compromise solution when taking into account performance, energy consumption and die area. The main ...
Federico Angiolini, Luca Benini, Alberto Caprara
IEEEPACT
2007
IEEE
14 years 2 months ago
L1 Cache Filtering Through Random Selection of Memory References
Distinguishing transient blocks from frequently used blocks enables servicing references to transient blocks from a small fully-associative auxiliary cache structure. By inserting...
Yoav Etsion, Dror G. Feitelson
ARCS
2004
Springer
13 years 12 months ago
STAFF: State Transition Applied Fast Flash Translation Layer
Abstract. Recently, flash memory is widely used in embedded applications since it has strong points: non-volatility, fast access speed, shock resistance, and low power consumption....
Tae-Sun Chung, Stein Park, Myung-Jin Jung, Bumsoo ...
EUROPAR
1999
Springer
14 years 11 days ago
Annotated Memory References: A Mechanism for Informed Cache Management
Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
Alvin R. Lebeck, David R. Raymond, Chia-Lin Yang, ...