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» Performance of Hardware Compressed Main Memory
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ISPAN
2005
IEEE
14 years 1 months ago
Process Scheduling for the Parallel Desktop
Commodity hardware and software are growing increasingly more complex, with advances such as chip heterogeneity and specialization, deeper memory hierarchies, ne-grained power ma...
Eitan Frachtenberg
CF
2006
ACM
14 years 2 months ago
Exploiting locality to ameliorate packet queue contention and serialization
Packet processing systems maintain high throughput despite relatively high memory latencies by exploiting the coarse-grained parallelism available between packets. In particular, ...
Sailesh Kumar, John Maschmeyer, Patrick Crowley
DATE
2010
IEEE
122views Hardware» more  DATE 2010»
14 years 1 months ago
SimTag: Exploiting tag bits similarity to improve the reliability of the data caches
— Though tag bits in the data caches are vulnerable to transient errors, few effort has been made to reduce their vulnerability. In this paper, we propose to exploit prevalent sa...
Jesung Kim, Soontae Kim, Yebin Lee
SIGMETRICS
2008
ACM
13 years 8 months ago
DRAM is plenty fast for wirespeed statistics counting
Per-flow network measurement at Internet backbone links requires the efficient maintanence of large arrays of statistics counters at very high speeds (e.g. 40 Gb/s). The prevailin...
Bill Lin, Jun (Jim) Xu
PPPJ
2009
ACM
14 years 2 months ago
Automatic parallelization for graphics processing units
Accelerated graphics cards, or Graphics Processing Units (GPUs), have become ubiquitous in recent years. On the right kinds of problems, GPUs greatly surpass CPUs in terms of raw ...
Alan Leung, Ondrej Lhoták, Ghulam Lashari