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» Performance of VLSI Engines for Lattice Computations
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ISQED
2005
IEEE
140views Hardware» more  ISQED 2005»
14 years 19 days ago
Toward Quality EDA Tools and Tool Flows Through High-Performance Computing
As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New...
Aaron N. Ng, Igor L. Markov
FCCM
2000
IEEE
148views VLSI» more  FCCM 2000»
13 years 11 months ago
An Adaptive Cryptographic Engine for IPSec Architectures
Architectures that implement the Internet Protocol Security (IPSec) standard have to meet the enormous computing demands of cryptographic algorithms. In addition, IPSec architectu...
Andreas Dandalis, Viktor K. Prasanna, José ...
VLSID
2005
IEEE
121views VLSI» more  VLSID 2005»
14 years 7 months ago
Impact of Channel Engineering on Unity Gain Frequency and Noise-Figure in 90nm NMOS Transistor for RF Applications
In this paper, we have studied and compared the RF performance metrics, unity gain frequency (ft) and Noise Figure (NF), of the devices with channel engineering consisting of halo...
R. Srinivasan, Navakanta Bhat
VLSI
2007
Springer
14 years 1 months ago
Simulation of hybrid computer architectures: simulators, methodologies and recommendations
— In the future, high performance computing systems may consist of multiple multicore processors and reconfigurable logic coprocessors. Industry trends indicate that such coproc...
Pranav Vaidya, Jaehwan John Lee
VLSI
2007
Springer
14 years 1 months ago
An efficient heterogeneous reconfigurable functional unit for an adaptive dynamic extensible processor
Replacing functional units of an extensible processor with reconfigurable functional units enhances performance and flexibility of processors to execute custom instructions. That ...
Arash Mehdizadeh, Behnam Ghavami, Morteza Saheb Za...