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ISCAS
2006
IEEE
122views Hardware» more  ISCAS 2006»
14 years 1 months ago
256-channel integrated neural interface and spatio-temporal signal processor
Abstract- We present an architecture and VLSI implemen- Various strategies in the analysis of spatio-temporal dynamtation of a distributed neural interface and spatio-temporal ics ...
J. N. Y. Aziz, Roman Genov, B. R. Bardakjian, M. D...
IEEEPACT
2007
IEEE
14 years 1 months ago
Architectural Support for the Stream Execution Model on General-Purpose Processors
There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream progra...
Jayanth Gummaraju, Mattan Erez, Joel Coburn, Mende...
GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
12 years 11 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
ICCS
2005
Springer
14 years 29 days ago
Self-optimization of Large Scale Wildfire Simulations
The development of efficient parallel algorithms for large scale wildfire simulations is a challenging research problem because the factors that determine wildfire behavior are com...
Jingmei Yang, Huoping Chen, Salim Hariri, Manish P...
BCS
2008
13 years 9 months ago
Beatbox - A Computer Simulation Environment for Computational Biology of the Heart
Despite over a century's study, the trigger mechanisms of cardiac arrhythmias are poorly understood. Even modern experimental methods do not provide sufficient temporal and s...
Ross McFarlane, Irina V. Biktasheva