955 search results - page 20 / 191 » Performance optimization of multiple memory architectures fo... |
HPCA
2005
IEEE
14 years 9 months ago
2005
IEEE
Memory system optimizations have been well studied on single-threaded systems; however, the wide use of simultaneous multithreading (SMT) techniques raises questions over their ef...
CLUSTER
2003
IEEE
14 years 2 months ago
2003
IEEE
The MPI Standard supports derived datatypes, which allow users to describe noncontiguous memory layout and communicate noncontiguous data with a single communication function. Thi...
PC
2007
13 years 8 months ago
2007
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
ACMMSP
2004
ACM
14 years 2 months ago
2004
ACM
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
PERCOM
2010
ACM
13 years 11 months ago
2010
ACM
We present an unsupervised speaker identification system for personal annotations of conversations and meetings. The system dynamically learns new speakers and recognizes already k...