As FPGA devices become larger, more coarse-grain modules coupled with large scale reconfigurable fabric become available, thus enabling new classes of applications to run effici...
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
This paper evaluates the performance of the parallel, main-memory DBMS, PRISMA/DB. First, an architecture for parallel query execution is presented. A performance model for the ex...
Annita N. Wilschut, Jan Flokstra, Peter M. G. Aper...
3D-integration is a promising technology to help combat the “Memory Wall” in future multi-core processors. Past work has considered using 3D-stacked DRAM as a large last-level...
Abstract— This paper presents an exploration framework which performs data assignment and access scheduling exploration for applications given a multilayer memory architecture. O...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...