Sciweavers

27 search results - page 4 / 6
» Performance simulation modeling for fast evaluation of pipel...
Sort
View
CODES
2007
IEEE
14 years 1 months ago
HySim: a fast simulation framework for embedded software development
Instruction Set Simulation (ISS) is widely used in system evaluation and software development for embedded processors. Despite the significant advancements in the ISS technology,...
Stefan Kraemer, Lei Gao, Jan Weinstock, Rainer Leu...
SPAA
2006
ACM
14 years 1 months ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
IEEEPACT
2007
IEEE
14 years 1 months ago
Architectural Support for the Stream Execution Model on General-Purpose Processors
There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream progra...
Jayanth Gummaraju, Mattan Erez, Joel Coburn, Mende...
ISPASS
2007
IEEE
14 years 1 months ago
PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator
In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 proces...
Matt T. Yourst
ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
11 years 10 months ago
Lane decoupling for improving the timing-error resiliency of wide-SIMD architectures
A significant portion of the energy dissipated in modern integrated circuits is consumed by the overhead associated with timing guardbands that ensure reliable execution. Timing ...
Evgeni Krimer, Patrick Chiang, Mattan Erez