34 search results - page 5 / 7 » Performance-centering optimization for system-level analog d... |
ISCAS
2003
IEEE
14 years 27 days ago
2003
IEEE
– The traditional way of approaching placement problems in computer-aided design (CAD) tools for analog layout is to explore an extremely large search space of feasible or unfeas...
ICCAD
2000
IEEE
14 years 19 hour ago
2000
IEEE
A tool is presented that gives a high-level estimation of the power consumed by an analog continuous-time OTA-C filter when given only high-level input parameters such as dynamic ...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
Efficient system-level design is increasingly relying on hierarchical design-space exploration, as well as compositional methods, to shorten time-to-market, leverage design re-use...
DAC
2007
ACM
13 years 11 months ago
2007
ACM
This paper presents MOJITO, a system which optimizes across thousands of analog circuit topologies simultaneously, and returns a set of sized topologies that collectively provide ...
SIPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...