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BMCBI
2005
94views more  BMCBI 2005»
13 years 8 months ago
Workflows in bioinformatics: meta-analysis and prototype implementation of a workflow generator
Background: Computational methods for problem solving need to interleave information access and algorithm execution in a problem-specific workflow. The structures of these workflo...
Alexander García Castro, Samuel Thoraval, L...
CGF
2005
149views more  CGF 2005»
13 years 8 months ago
Real-Time Ray-Casting and Advanced Shading of Discrete Isosurfaces
This paper presents a real-time rendering pipeline for implicit surfaces defined by a regular volumetric grid of samples. We use a ray-casting approach on current graphics hardwar...
Markus Hadwiger, Christian Sigg, Henning Scharsach...
DAC
2005
ACM
14 years 9 months ago
High performance encryption cores for 3G networks
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...
René Cumplido, Tomás Balderas-Contre...
ISSS
1999
IEEE
89views Hardware» more  ISSS 1999»
14 years 9 days ago
Loop Scheduling and Partitions for Hiding Memory Latencies
Partition Scheduling with Prefetching (PSP) is a memory latency hiding technique which combines the loop pipelining technique with data prefetching. In PSP, the iteration space is...
Fei Chen, Edwin Hsing-Mean Sha
MICRO
1992
IEEE
133views Hardware» more  MICRO 1992»
14 years 3 days ago
Code generation schema for modulo scheduled loops
Software pipelining is an important instruction scheduling technique for efficiently overlapping successive iterations of loops and executing them in parallel. Modulo scheduling i...
B. Ramakrishna Rau, Michael S. Schlansker, Parthas...