192 search results - page 13 / 39 » Pipelined FPGA Adders |
FPL
2006
Springer
13 years 11 months ago
2006
Springer
: FPGA-based acceleration of molecular dynamics (MD) has been the subject of several recent studies. Here we describe a new non-bonded force computation pipeline implemented on a 2...
FCCM
2009
IEEE
13 years 11 months ago
2009
IEEE
Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. Due to the available on-chip memory and the number of I/O pins of Field Programmab...
FPL
2008
Springer
13 years 9 months ago
2008
Springer
Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. However, this approach results in inefficient memory utilization. Due to available...
FPL
2001
Springer
14 years 12 days ago
2001
Springer
Asynchronous logic design has been around for decades. However, only recently has it gained any commercial success. Research has focused on a wide variety of uses, from microproces...
PDPTA
2000
13 years 9 months ago
2000
This paper presents a survey of techniques to implement multiplications by constants on FPGAs. It shows in particular that a simple and well-known technique, canonical signed recod...