192 search results - page 27 / 39 » Pipelined FPGA Adders |
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
In this paper we advocate the use of pre-decoding for CAM-based pattern matching. We implement an FPGA based sub-system for NIDS (Snort) pattern matching using a combination of te...
VLSISP
2010
13 years 2 months ago
2010
We propose a new parallelization scheme for the hmmsearch function of the HMMER software, in order to target FPGA technology. hmmsearch is a very compute intensive software for bio...
FPL
2009
Springer
13 years 11 months ago
2009
Springer
The acceleration of molecular dynamics (MD) simulations using high performance reconfigurable computing (HPRC) has been much studied. Given the intense competition from multicore...
SIPS
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents a low-complexity, high-speed 4-dimensional 8-ary Phase Shift Keying Trellis Coded Modulation (4-D 8PSK TCM) decoder. In the design, an efficient architecture f...
DAC
1999
ACM
14 years 8 days ago
1999
ACM
This work presents an overview of the principles that underlie the speed-up achievable by dynamic hardware reconfiguration, proposes a more precise taxonomy for the execution mode...