192 search results - page 29 / 39 » Pipelined FPGA Adders |
137
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FPL
2001
Springer
15 years 8 months ago
2001
Springer
This paper presents parameterized module-generators for pipelined function evaluation using lookup tables, adders, shifters and multipliers. We discuss trade-offs involved between...
159
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FPGA
2004
ACM
15 years 9 months ago
2004
ACM
We present a cryptographic architecture optimization technique called divide-and-concatenate based on two observations: (i) the area of a multiplier and associated data path decre...
133
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ICCD
2006
IEEE
16 years 1 months ago
2006
IEEE
— High secure cryptographic systems require large bit-length encryption keys which presents a challenge to their efficient hardware implementation especially in embedded devices...
134
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IPPS
2006
IEEE
15 years 10 months ago
2006
IEEE
Diffusion Tensor Imaging (DTI) tractography in Magnetic Resonance Imaging (MRI) is a computationally intensive procedure, requiring on the order of tens of minutes to complete tr...
116
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ISPAN
2005
IEEE
15 years 10 months ago
2005
IEEE
Within the parallel computing domain, field programmable gate arrays (FPGA) are no longer restricted to their traditional role as substitutes for application-specific integrated...