192 search results - page 29 / 39 » Pipelined FPGA Adders |
FPL
2001
Springer
14 years 14 days ago
2001
Springer
This paper presents parameterized module-generators for pipelined function evaluation using lookup tables, adders, shifters and multipliers. We discuss trade-offs involved between...
FPGA
2004
ACM
14 years 1 months ago
2004
ACM
We present a cryptographic architecture optimization technique called divide-and-concatenate based on two observations: (i) the area of a multiplier and associated data path decre...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
— High secure cryptographic systems require large bit-length encryption keys which presents a challenge to their efficient hardware implementation especially in embedded devices...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Diffusion Tensor Imaging (DTI) tractography in Magnetic Resonance Imaging (MRI) is a computationally intensive procedure, requiring on the order of tens of minutes to complete tr...
ISPAN
2005
IEEE
14 years 1 months ago
2005
IEEE
Within the parallel computing domain, field programmable gate arrays (FPGA) are no longer restricted to their traditional role as substitutes for application-specific integrated...