47 search results - page 8 / 10 » Pipelined hash-join on multithreaded architectures |
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
HPCA
2008
IEEE
14 years 7 months ago
2008
IEEE
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...
COMPSAC
2008
IEEE
14 years 1 months ago
2008
IEEE
The rapid growth of Internet population leads to the shortage of IP addresses. The next generation IP protocol, IPv6, which extends the IP address length from 32 bits to 128 bits,...
HPCA
1999
IEEE
13 years 11 months ago
1999
IEEE
Processors that can simultaneously execute multiple paths of execution will only exacerbate the fetch bandwidth problem already plaguing conventional processors. On a multiple-pat...
MICRO
1999
IEEE
13 years 11 months ago
1999
IEEE
Branch mispredictions can have a major performance impact on high-performance processors. Multipath execution has recently been introduced to help limit the misprediction penaltie...