27 search results - page 3 / 6 » Pipelining Saturated Accumulation |
ISCAS
2003
IEEE
14 years 9 days ago
2003
IEEE
We present an algorithmic analog-to-digital converter (ADC) architecture for large-scale parallel quantization of internally analog variables in externally digital array processor...
ISCA
2002
IEEE
13 years 12 months ago
2002
IEEE
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Many embedded systems use a simple pipelined RISC processor for computation and an on-chip SRAM for data storage. We present an enhancement called Intelligent SRAM (ISRAM) that co...
PG
2007
IEEE
14 years 1 months ago
2007
IEEE
We propose a technique for fusing a bracketed exposure sequence into a high quality image, without converting to HDR first. Skipping the physically-based HDR assembly step simpli...
NOCS
2010
IEEE
13 years 4 months ago
2010
IEEE
Router microarchitecture plays a central role in the performance of an on-chip network (NoC). Buffers are needed in routers to house incoming flits which cannot be immediately forw...