95 search results - page 8 / 19 » Pipelining with Futures |
ISCA
2002
IEEE
14 years 13 days ago
2002
IEEE
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
FPL
2010
Springer
13 years 5 months ago
2010
Springer
When utilizing reconfigurable hardware there are many applications that will require more memory than is available in a single hardware block. While FPGAs have tools and mechanisms...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
—A high-throughput hardware architecture and FPGA implementation of the 64-bit NESSIE proposal, MISTY1 block cipher, is presented in this paper. This architecture, in contrast to...
ARCS
2004
Springer
14 years 27 days ago
2004
Springer
: Today’s network processor utilize parallel processing in order to cope with the traffic growth and wire-speed of current and future network technologies. In this paper, we stu...