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DSD
2003
IEEE
138views Hardware» more  DSD 2003»
14 years 3 months ago
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
Tang Lei, Shashi Kumar
SOFTVIS
2006
ACM
14 years 4 months ago
Evolutionary layout: preserving the mental map during the development of class models
It is vital for any developer to keep track of changes during his project. Thus, it is common practice to take static snapshots of single class diagrams. But to preserve the menta...
Susanne Jucknath-John, Dennis Graf, Gabriele Taent...
IJRR
2006
116views more  IJRR 2006»
13 years 10 months ago
The Graph SLAM Algorithm with Applications to Large-Scale Mapping of Urban Structures
This article presents GraphSLAM, a unifying algorithm for the offline SLAM problem. GraphSLAM is closely related to a recent sequence of research papers on applying optimization t...
Sebastian Thrun, Michael Montemerlo
TIT
2011
131views more  TIT 2011»
13 years 5 months ago
On the Hardness of Approximating the Network Coding Capacity
Abstract—This work addresses the computational complexity of achieving the capacity of a general network coding instance. We focus on the linear capacity, namely the capacity of ...
Michael Langberg, Alexander Sprintson
IPPS
1993
IEEE
14 years 2 months ago
Mapping Interconnection Networks into VEDIC Networks
We show the universality of the VEDIC network in simulating other well known interconnection networks by generating the parameters of the VEDtC network automatically. Algorithms a...
Vipin Chaudhary, Bikash Sabata, Jake K. Aggarwal