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DAC
2007
ACM
14 years 7 months ago
Modeling the Function Cache for Worst-Case Execution Time Analysis
Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function ca...
Raimund Kirner, Martin Schoeberl
DAC
1999
ACM
14 years 7 months ago
CAD Directions for High Performance Asynchronous Circuits
This paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using Relative Timing. This method...
Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi...
DAC
2004
ACM
14 years 7 months ago
Refining the SAT decision ordering for bounded model checking
Bounded Model Checking (BMC) relies on solving a sequence of highly correlated Boolean satisfiability (SAT) problems, each of which corresponds to the existence of counter-example...
Chao Wang, HoonSang Jin, Gary D. Hachtel, Fabio So...
SIGSOFT
2008
ACM
14 years 7 months ago
Towards compositional synthesis of evolving systems
Synthesis of system configurations from a given set of features is an important and very challenging problem. This paper makes a step towards this goal by describing an efficient ...
Shiva Nejati, Mehrdad Sabetzadeh, Marsha Chechik, ...
TCS
2002
13 years 6 months ago
CASL: the Common Algebraic Specification Language
The Common Algebraic Specification Language Casl is an expressive language for the formal specification of functional requirements and modular design of software. It has been desi...
Egidio Astesiano, Michel Bidoit, Hélè...