Due to the large die sizes and tight relative clock skew margins, the impact of interconnect manufacturing variations on the clock skew in today's gigahertz microprocessors c...
Ying Liu, Sani R. Nassif, Lawrence T. Pileggi, And...
As process technology continues to scale into the nanoscale regime, interconnect plays an ever increasing role in determining VLSI system performance. As the complexity of these sy...
As the VLSI technology scaling down, the electromigration problem becomes one of the major concerns in high-performance IC design for both power network and signal interconnects. ...
Muzhou Shao, D. F. Wong, Youxin Gao, Li-Pen Yuan, ...
Splatting-based rendering techniques are currently the best choice for efficient high-quality rendering of point-based geometries. However, such techniques are not suitable for la...
This paper introduces a cost-effective technique to deal with CMP coherence protocol requirements from the interconnection network point of view. A mechanism is presented to avoid...