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DAC
2000
ACM
14 years 11 months ago
Impact of interconnect variations on the clock skew of a gigahertz microprocessor
Due to the large die sizes and tight relative clock skew margins, the impact of interconnect manufacturing variations on the clock skew in today's gigahertz microprocessors c...
Ying Liu, Sani R. Nassif, Lawrence T. Pileggi, And...
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
14 years 2 months ago
Frequency Selective Model Order Reduction via Spectral Zero Projection
As process technology continues to scale into the nanoscale regime, interconnect plays an ever increasing role in determining VLSI system performance. As the complexity of these sy...
Mehboob Alam, Arthur Nieuwoudt, Yehia Massoud
ICCAD
2002
IEEE
73views Hardware» more  ICCAD 2002»
14 years 7 months ago
Shaping interconnect for uniform current density
As the VLSI technology scaling down, the electromigration problem becomes one of the major concerns in high-performance IC design for both power network and signal interconnects. ...
Muzhou Shao, D. F. Wong, Youxin Gao, Li-Pen Yuan, ...
CG
2004
Springer
13 years 10 months ago
Dynamic surfel set refinement for high-quality rendering
Splatting-based rendering techniques are currently the best choice for efficient high-quality rendering of point-based geometries. However, such techniques are not suitable for la...
Gaël Guennebaud, Loïc Barthe, Mathias Pa...
NOCS
2008
IEEE
14 years 4 months ago
Reducing the Interconnection Network Cost of Chip Multiprocessors
This paper introduces a cost-effective technique to deal with CMP coherence protocol requirements from the interconnection network point of view. A mechanism is presented to avoid...
Pablo Abad, Valentin Puente, José-Án...