146 search results - page 26 / 30 » Positional Adaptation of Processors: Application to Energy R... |
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
Vertex texturing is state-of-the-art functionality of vertex. Thus, traditional texture caches used in RE are not the 3D geometry processor. However, it aggravates the always appli...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
CLUSTER
2000
IEEE
13 years 7 months ago
2000
IEEE
Clusters of workstations and networked parallel computing systems are emerging as promising computational platforms for HPC applications. The processors in such systems are typica...
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
Abstract--This paper summarizes a special session on multicore/multi-processor system-on-chip (MPSoC) programming challenges. Wireless multimedia terminals are among the key driver...
ICS
2010
Tsinghua U.
13 years 10 months ago
2010
Tsinghua U.
Existing supercomputers have hundreds of thousands of processor cores, and future systems may have hundreds of millions. Developers need detailed performance measurements to tune ...