35 search results - page 4 / 7 » Power - Performance Optimization for Custom Digital Circuits |
DAC
1997
ACM
13 years 11 months ago
1997
ACM
We propose a methodology for applying gate-level logic transformations to optimize power in digital circuits. Statistically simulated[14] switching information, gate delays, signa...
GLOBECOM
2010
IEEE
13 years 5 months ago
2010
IEEE
We study the energy consumption of individual links in wireless sensor networks (WSN). Three widely used digital modulation schemes, i.e. MQAM, MPSK, and MFSK, are analyzed and com...
ASPDAC
2004
ACM
14 years 1 months ago
2004
ACM
— The problem of minimizing dynamic power consumption by scaling down the supply voltage of computational elements off critical paths is widely addressed in the literature for th...
VLSID
1999
IEEE
14 years 3 days ago
1999
IEEE
This paper provides a theoretical basis for eliminating or reducing the energy consumption due to transients in a synchronous digital circuit. The transient energy is minimized wh...
PATMOS
2007
Springer
14 years 1 months ago
2007
Springer
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...