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EMSOFT
2004
Springer
14 years 26 days ago
Binary translation to improve energy efficiency through post-pass register re-allocation
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...
Kun Zhang, Tao Zhang, Santosh Pande
ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
13 years 5 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
IPPS
2005
IEEE
14 years 1 months ago
Power and Energy Profiling of Scientific Applications on Distributed Systems
Power consumption is a troublesome design constraint for emergent systems such as IBM’s BlueGene /L. If current trends continue, future petaflop systems will require 100 megawat...
Xizhou Feng, Rong Ge, Kirk W. Cameron
DAC
2005
ACM
13 years 9 months ago
Power grid simulation via efficient sampling-based sensitivity analysis and hierarchical symbolic relaxation
On-chip supply networks are playing an increasingly important role for modern nanometer-scale designs. However, the ever growing sizes of power grids make the analysis problem ext...
Peng Li
DSD
2010
IEEE
137views Hardware» more  DSD 2010»
13 years 5 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...