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IJCNN
2008
IEEE
14 years 2 months ago
Wafer-scale integration of analog neural networks
Abstract— This paper introduces a novel design of an artificial neural network tailored for wafer-scale integration. The presented VLSI implementation includes continuous-time a...
Johannes Schemmel, Johannes Fieres, Karlheinz Meie...
MSWIM
2004
ACM
14 years 1 months ago
Detailed models for sensor network simulations and their impact on network performance
Recent trends in sensor network simulation can be divided between less flexible but accurate emulation based approach and more generic but less detailed network simulator models....
Maneesh Varshney, Rajive Bagrodia
TPDS
2002
105views more  TPDS 2002»
13 years 7 months ago
HiPER: A Compact Narrow Channel Router with Hop-by-Hop Error Correction
Multiprocessor architectures demand efficient interprocessor communication to maximize system utilization and performance. To meet future demands, these interconnects must communic...
Phil May, Santithorn Bunchua, D. Scott Wills
ISPD
1997
ACM
100views Hardware» more  ISPD 1997»
13 years 12 months ago
A pseudo-hierarchical methodology for high performance microprocessor design
- This paper reports on a highly effective methodology to construct complex high performance microprocessors. Critical aspects of the methodology include an integrated database for...
A. Bertolet, K. Carpenter, Keith M. Carrig, Albert...
SENSYS
2006
ACM
14 years 1 months ago
Interest dissemination with directional antennas for wireless sensor networks with mobile sinks
Introducing mobile data sinks into wireless sensor networks (WSNs) improves the energy efficiency and the network lifetime, and is demanded for many application scenarios, such a...
Yihong Wu, Lin Zhang, Yiqun Wu, Zhisheng Niu