178 search results - page 6 / 36 » Power Compiler: A Gate-Level Power Optimization and Synthesi... |
DAC
1995
ACM
14 years 1 months ago
1995
ACM
—We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. Optimizations at the circuit, logic, architectural and system levels are cons...
DAC
2003
ACM
14 years 10 months ago
2003
ACM
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
FGCN
2008
IEEE
14 years 4 months ago
2008
IEEE
Power consumption is becoming a primary concern as a result of tremendous increasing in computer power usage. Innumerable methods and techniques have been exploited to address thi...
RTSS
1998
IEEE
14 years 2 months ago
1998
IEEE
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
ASPDAC
2001
ACM
14 years 1 months ago
2001
ACM
Power-efficient design requires reducing power dissipation in all parts of the design and during all stages of the design process subject to constraints on the system performance ...