37 search results - page 8 / 8 » Power Dissipation in Deep Submicron CMOS Digital Circuits |
CSREAESA
2003
13 years 9 months ago
2003
Most so-called “adiabatic” digital logic circuit families reported in the low-power design literature are actually not truly adiabatic, in that they do not satisfy the general...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper describes a fast-lock mixed-mode delaylocked loop (MMDLL) for wide-range operation and multiphase outputs. The architecture of the proposed DLL uses the mixed-mode time...