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ISLPED
2010
ACM
169views Hardware» more  ISLPED 2010»
13 years 7 months ago
TurboTag: lookup filtering to reduce coherence directory power
On-chip coherence directories of today's multi-core systems are not energy efficient. Coherence directories dissipate a significant fraction of their power on unnecessary loo...
Pejman Lotfi-Kamran, Michael Ferdman, Daniel Crisa...
DSD
2008
IEEE
139views Hardware» more  DSD 2008»
13 years 9 months ago
Revisiting the Cache Effect on Multicore Multithreaded Network Processors
Caching mechanism has achieved great success in general purpose processor; however, its deployment in Network Processor (NP) raises questions over its effectiveness under the new ...
Zhen Liu, Jia Yu, Xiaojun Wang, Bin Liu, Laxmi N. ...
ISCA
2005
IEEE
166views Hardware» more  ISCA 2005»
14 years 29 days ago
Increased Scalability and Power Efficiency by Using Multiple Speed Pipelines
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
Emil Talpes, Diana Marculescu
ICS
2010
Tsinghua U.
13 years 9 months ago
The auction: optimizing banks usage in Non-Uniform Cache Architectures
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
Javier Lira, Carlos Molina, Antonio Gonzále...
EUC
2004
Springer
14 years 23 days ago
Non-uniform Set-Associative Caches for Power-Aware Embedded Processors
Abstract. Power consumption is becoming one of the most important constraints for microprocessor design in nanometer-scale technologies. Especially, as the transistor supply voltag...
Seiichiro Fujii, Toshinori Sato