1238 search results - page 112 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
172
click to vote
VLSISP
2011
15 years 1 months ago
2011
Abstract Fractional Motion Estimation (FME) in highdefinition H.264 presents a significant design challenge in terms of memory bandwidth, latency and area cost as there are various...
162
click to vote
MASCOTS
2007
15 years 7 months ago
2007
—Modern micro-architecture simulators are many orders of magnitude slower than the hardware they simulate. The use of multiprocessor architectures for supporting future mobile an...
184
click to vote
TPDS
2008
15 years 6 months ago
2008
Multicore architectures have been ruling the recent microprocessor design trend. This is due to different reasons: better performance, thread-level parallelism bounds in modern app...
170
click to vote
DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
This paper presents a on-chip stack based memory organization that effectively reduces the energy dissipation in programmable embedded system architectures. Most embedded systems ...
183
click to vote
EMSOFT
2005
Springer
15 years 11 months ago
2005
Springer
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...