Sciweavers

1238 search results - page 86 / 248
» Power Efficient Processor Architecture and The Cell Processo...
Sort
View
DAC
2000
ACM
16 years 7 months ago
MorphoSys: case study of a reconfigurable computing system targeting multimedia applications
In this paper, we present a case study for the design, programming and usage of a reconfigurable system-on-chip, MorphoSys, which is targeted at computation-intensive applications...
Hartej Singh, Guangming Lu, Eliseu M. Chaves Filho...
PPOPP
2009
ACM
16 years 6 months ago
Mapping parallelism to multi-cores: a machine learning based approach
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
Zheng Wang, Michael F. P. O'Boyle
MM
2009
ACM
217views Multimedia» more  MM 2009»
16 years 18 days ago
Streaming HD H.264 encoder on programmable processors
Programmable processors have great advantage over dedicated ASIC design under intense time-to-market pressure. However, realtime encoding of high-definition (HD) H.264 video (up t...
Nan Wu, Mei Wen, Wei Wu, Ju Ren, Huayou Su, Changq...
IPPS
2005
IEEE
15 years 11 months ago
Configuration Steering for a Reconfigurable Superscalar Processor
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration ...
Brian F. Veale, John K. Antonio, Monte P. Tull
SIGMOD
2009
ACM
202views Database» more  SIGMOD 2009»
16 years 6 months ago
ZStream: a cost-based query processor for adaptively detecting composite events
Composite (or Complex) event processing (CEP) systems search sequences of incoming events for occurrences of userspecified event patterns. Recently, they have gained more attentio...
Yuan Mei, Samuel Madden