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» Power Macromodeling for High Level Power Estimation
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AHS
2007
IEEE
251views Hardware» more  AHS 2007»
13 years 12 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan
IPPS
2002
IEEE
14 years 23 days ago
System-Level Analysis for MPEG-4 Decoding on a Multi-Processor Architecture
The convergence of TV and new features such as Internet and games, requires a generic media-processing platform, that enables simultaneous execution of very diverse tasks, ranging...
Egbert G. T. Jaspers, Erik B. van der Tol, Peter H...
ICDM
2003
IEEE
111views Data Mining» more  ICDM 2003»
14 years 1 months ago
OP-Cluster: Clustering by Tendency in High Dimensional Space
Clustering is the process of grouping a set of objects into classes of similar objects. Because of unknownness of the hidden patterns in the data sets, the definition of similari...
Jinze Liu, Wei Wang 0010
DAC
2004
ACM
13 years 11 months ago
Leakage in nano-scale technologies: mechanisms, impact and design considerations
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...
Amit Agarwal, Chris H. Kim, Saibal Mukhopadhyay, K...
ISVLSI
2006
IEEE
106views VLSI» more  ISVLSI 2006»
14 years 1 months ago
Self-Timed Thermally-Aware Circuits
Thermal management is becoming increasingly important in circuit designs with high power density. Circuits that overheat beyond specified operating conditions may suffer timing f...
David Fang, Filipp Akopyan, Rajit Manohar