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» Power Macromodeling for High Level Power Estimation
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DATE
2002
IEEE
84views Hardware» more  DATE 2002»
14 years 25 days ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...
BMCBI
2010
125views more  BMCBI 2010»
13 years 8 months ago
Asymmetric microarray data produces gene lists highly predictive of research literature on multiple cancer types
Background: Much of the public access cancer microarray data is asymmetric, belonging to datasets containing no samples from normal tissue. Asymmetric data cannot be used in stand...
Noor B. Dawany, Aydin Tozeren
DATE
2003
IEEE
127views Hardware» more  DATE 2003»
14 years 1 months ago
Exploring High Bandwidth Pipelined Cache Architecture for Scaled Technology
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...
Amit Agarwal, Kaushik Roy, T. N. Vijaykumar
CRV
2004
IEEE
146views Robotics» more  CRV 2004»
13 years 11 months ago
Estimating Camera Motion through a 3D Cluttered Scene
Previous methods for estimating the motion of an observer through a static scene require that image velocities can be measured. For the case of motion through a cluttered 3D scene...
Richard Mann, Michael S. Langer
IJHPCA
2008
75views more  IJHPCA 2008»
13 years 7 months ago
Towards Ultra-High Resolution Models of Climate and Weather
We present a speculative extrapolation of the performance aspects of an atmospheric general circulation model to ultra-high resolution and describe alternative technological paths...
Michael F. Wehner, Leonid Oliker, John Shalf