430 search results - page 17 / 86 » Power Optimized Combinational Logic Design |
GLOBECOM
2008
IEEE
14 years 2 months ago
2008
IEEE
— We present a crosslayer framework for optimizing the performance of wireless networks as measured by applications or upper layer protocols. The approach combines adaptive modul...
CL
2000
Springer
13 years 11 months ago
2000
Springer
This paper reports on the design and implementation of FLORA -- a powerful DOOD system that incorporates the features of F-logic, HiLog, and Transaction Logic. FLORA is implemented...
PATMOS
2007
Springer
14 years 1 months ago
2007
Springer
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
TCAD
2008
13 years 7 months ago
2008
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
This work first presents an analytical repeater insertion method which optimizes power under delay constraint for a single net. This method finds the optimal repeater insertion ...