430 search results - page 31 / 86 » Power Optimized Combinational Logic Design |
ISVLSI
2007
IEEE
14 years 5 months ago
2007
IEEE
Performance, power, and functionality, yield and manufacturability are rapidly becoming additional critical factors that must be considered at higher levels of ion. A possible sol...
MICRO
2010
IEEE
13 years 9 months ago
2010
IEEE
To extend the exponential performance scaling of future chip multiprocessors, improving energy efficiency has become a first-class priority. Single-chip heterogeneous computing ha...
GLVLSI
2006
IEEE
14 years 5 months ago
2006
IEEE
As CMOS devices and operating voltages are scaled down, noise and defective devices will impact the reliability of digital circuits. Probabilistic computing compatible with CMOS o...
ICC
2007
IEEE
14 years 5 months ago
2007
IEEE
Abstract - We propose a new space-time code (STC) structure that can achieve generalized optimal diversity (GOD) with a reduced design complexity, and also provide an increased cod...
ASPDAC
2007
ACM
14 years 3 months ago
2007
ACM
The scaling of CMOS technology into the nanometer era enables the fabrication of highly integrated systems, which increasingly contain analog and/or RF parts. However, scaling into...