430 search results - page 45 / 86 » Power Optimized Combinational Logic Design |
FDTC
2006
Springer
14 years 1 months ago
2006
Springer
Abstract. Balanced gates are an effective countermeasure against power analysis attacks only if they can be guaranteed to maintain their power balance. Traditional testing and reli...
ASPDAC
2005
ACM
14 years 2 days ago
2005
ACM
—Dynamic programmable logic arrays (PLAs) which are built of the NOR–NOR structure, have been very popular in high performance design because of their high-speed and predictabl...
ICDE
1993
IEEE
14 years 2 months ago
1993
IEEE
Emerging database application domains demand not only new functionality but also high performance. To satisfy these two requirements, the Volcano project provides efficient, exten...
ICCD
2008
IEEE
14 years 7 months ago
2008
IEEE
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
CORR
2010
Springer
13 years 10 months ago
2010
Springer
Abstract--In this two-part paper, we study the design and optimization of limited feedback single-user and multiuser systems with a multiple-antenna base station and single-antenna...