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» Power and performance optimization at the system level
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ASPDAC
2007
ACM
98views Hardware» more  ASPDAC 2007»
15 years 8 months ago
Node Mergers in the Presence of Don't Cares
Abstract-- SAT sweeping is the process of merging two or more functionally equivalent nodes in a circuit by selecting one of them to represent all the other equivalent nodes. This ...
Stephen Plaza, Kai-Hui Chang, Igor L. Markov, Vale...
SC
2009
ACM
15 years 11 months ago
Autotuning multigrid with PetaBricks
Algorithmic choice is essential in any problem domain to realizing optimal computational performance. Multigrid is a prime example: not only is it possible to make choices at the ...
Cy P. Chan, Jason Ansel, Yee Lok Wong, Saman P. Am...
DATE
2010
IEEE
132views Hardware» more  DATE 2010»
15 years 9 months ago
Programmable aging sensor for automotive safety-critical applications
- Electronic systems for safety-critical automotive applications must operate for many years in harsh environments. Reliability issues are worsening with device scaling down, while...
Julio César Vázquez, Víctor H...
ESTIMEDIA
2007
Springer
15 years 8 months ago
Still Image Processing on Coarse-Grained Reconfigurable Array Architectures
Due to the increasing demands on efficiency, performance and flexibility reconfigurable computational architectures are very promising candidates in embedded systems design. Recent...
Matthias Hartmann, Vasileios (Vassilis) Pantazis, ...
ISCA
1993
IEEE
125views Hardware» more  ISCA 1993»
15 years 8 months ago
Evaluation of Mechanisms for Fine-Grained Parallel Programs in the J-Machine and the CM-5
er uses an abstract machine approach to compare the mechanisms of two parallel machines: the J-Machine and the CM-5. High-level parallel programs are translated by a single optimi...
Ellen Spertus, Seth Copen Goldstein, Klaus E. Scha...