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» Power minimization using control generated clocks
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MICRO
2008
IEEE
136views Hardware» more  MICRO 2008»
14 years 3 months ago
Power to the people: Leveraging human physiological traits to control microprocessor frequency
Any architectural optimization aims at satisfying the end user. However, modern architectures execute with little to no knowledge about the individual user. If architectures could...
Alex Shye, Yan Pan, Benjamin Scholbrock, J. Scott ...
ARCS
2009
Springer
14 years 3 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
VLSID
2004
IEEE
138views VLSI» more  VLSID 2004»
14 years 9 months ago
Synthesis-driven Exploration of Pipelined Embedded Processors
Recent advances on language based software toolkit generation enables performance driven exploration of embedded systems by exploiting the application behavior. There is a need fo...
Prabhat Mishra, Arun Kejariwal, Nikil Dutt
SOCC
2008
IEEE
106views Education» more  SOCC 2008»
14 years 3 months ago
A robust ultra-low power asynchronous FIFO memory with self-adaptive power control
First-in first-out (FIFO) memories are widely used in SoC for data buffering and flow control. In this paper, a robust ultra-low power asynchronous FIFO memory is proposed. With s...
Mu-Tien Chang, Po-Tsang Huang, Wei Hwang
ICDCSW
2003
IEEE
14 years 2 months ago
Computation of Minimal Uniform Transmission Power in Ad Hoc Wireless Networks
Power conservation is a critical issue for ad hoc wireless networks. The main objective of the paper is to find the minimum uniform transmission power of an ad hoc wireless netwo...
Qing Dai, Jie Wu