732 search results - page 39 / 147 » Power minimization using control generated clocks |
ASYNC
2003
IEEE
14 years 2 months ago
2003
IEEE
We present a high-speed, clockless, serial link transceiver for inter-chip communication in asynchronous VLSI systems. Serial link transceivers achieve high offchip data rates by ...
CIC
2006
13 years 10 months ago
2006
Abstract-- Topology control is the problem of assigning power levels to the nodes of an ad hoc network so as to maintain a specified network topology while minimizing energy consum...
HPCA
2003
IEEE
14 years 9 months ago
2003
IEEE
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
JUCS
2007
13 years 8 months ago
2007
: The development of processors with full custom technology has some disadvantages, such as the time used to design the processors and the cost of the implementation. In this artic...
SAFECOMP
2009
Springer
14 years 3 months ago
2009
Springer
The advanced electric power grid is a cyber-physical system comprised of physical components such as transmission lines and generators and a network of embedded systems deployed fo...